Silicon carbide (SiC) provides a wide bandgap, and a maximum insulating electric field larger than silicon (Si) by approximately one digit. Furthermore, SiC is comparable to Si in carrier mobility and comparable to GaAs in electron saturation drift rate, and also large in dielectric strength. As such, SiC is a material expected to be applied to rapid switching devices or devices for large power and similar, next-generation semiconductor device for electric power (in particular, junction field effect transistor (JFET), and the like).
SiC's crystal structure includes hexagonal close packed structure and cubic close packed structure, and the former structure further includes a large number of structures different in layer repetition cycle and more than 100 types of poly-type are known. Representative poly-types are for example 3C, 4H, 6H and the like. “C” represents cubic crystal and “H” represents hexagonal crystal, and a preceding numeral represents a repetition cycle. For cubic system, 3C is the only one, and it is referred to as β-SiC while the others are generally referred to as α-SiC.
Recently, Schottky diode, vertical MOSFET, JFET, thyristor and the like, or CMOS-IC, the most general-purpose semiconductor device, are prototyped as devices for electric power and their characteristics suggest that they have a potential to implement significantly satisfactory characteristics as compared with conventional Si semiconductor devices.
While SiC-vertical MOS semiconductor device, SiC-JFET device and the like are expected to implement significantly excellent characteristics, in reality, however, there is only a small number of reports that such devices have achieved satisfactory characteristics and the devices are not positively fabricated. This is because it is difficult to control microfabrication in a step such as implanting ions into a SiC semiconductor substrate.
When a Si-based semiconductor substrate is used to fabricate a semiconductor device, p dopant and n dopant are selectively introduced through a single mask and are thermally diffused to implement precise channel density. More specifically, JFET and similar semiconductor devices have characteristics depending on the channel's dimensions, which can significantly precisely be controlled, and increased yield of JFET or similar semiconductor devices can be achieved.
In contrast, if a SiC semiconductor substrate is used to fabricate a semiconductor device, the substrate hardly allows dopant diffusion, as compared with a Si-based semiconductor substrate, and it is difficult to precisely control channel density and the like, as can be done for example in a semiconductor device employing a Si-based semiconductor substrate. The device tends to increase for example in channel resistance, with significantly large variation. As such, such characteristics of SiC semiconductor device as expected are at present insufficiently achieved.
Furthermore, if a SiC semiconductor substrate is used to fabricate a semiconductor device and ions are implanted to introduce dopant, the dopant activates at poor rate. To increase the rate, the ions may be implanted at a high temperature of 300° C. or higher. This, however, prevents a resist film from being suitably used as a mask layer for ion implantation. Furthermore, if silicon oxide film, polysilicon film or the like is used as a mask layer, and exposed to high temperature, the mask layer tends to crack, peel off and the like disadvantageously.
As described above when a SiC semiconductor substrate is used to fabricate a semiconductor device (also referred in the present specification as a “SiC device”) it is necessary to implant ions in an environment of high temperature to reduce damage to crystal.
Accordingly there is a demand for a material developed to be usable as a mask layer used in implanting ions in an environment of high temperature, and techniques are being developed in associated fields. It should be noted that a mask layer containing SiO2 as material has a property that can ensure high energy implantation in an environment of high temperature. Such a property is utilized and SiO2 film is used as a mask layer for ion implantation and subsequently thermal diffusion is performed to form a sufficiently deep doped region, as disclosed in Japanese Patent Laying-Open No. 10-256173 and Power Device, Power IC Handbook, edited by the Institute of Electrical Engineers of Japan, High Performance and High Function Power Device and Power IC Investigation and Research Committee, Corona Publishing Co., Ltd., July 1996, pp. 38-41.
For example, a silicon substrate is subjected to CVD to have the entire surface with SiO2 film thereon and subsequently photolithography is employed to form a mask pattern. In the photolithography, the SiO2 film has an entire surface provided with photoresist and exposed to light only at a portion to be provided with a hole. The photoresist is thus exposed, and the exposed portion is removed by development. Then on the remaining photoresist the underlying SiO2 film is dry etched and thus opened and thereafter the photoresist is removed to obtain a mask pattern of SiO2.
Subsequently, B or similar dopant ions are implanted in approximately 1×1014 cm−2. As the SiO2 film serves as a mask, the dopant ions are implanted only in the film's opening. In the ion implantation, ions of dopant obtained by discharging AsH3, PH3, BF2 or similar gas are accelerated to several tens to several hundreds keV and thus implanted into a substrate. Subsequently, thermal diffusion is performed to push in the dopant and thereafter the SiO2 film is dissolved with hydrofluoric acid and thus removed. Subsequently in a semiconductor device fabrication process such thin-film deposition, photolithography, etching, and ion implantation are repeatedly performed.
If a SiC device is fabricated, however, a SiC semiconductor substrate does not allow sufficient thermal diffusion of dopant. Accordingly, to achieve sufficiently deep dopant implantation, high energy needs to be applied to implant ions, and if the mask layer of SiO2 exceeds 1 μm in thickness, it is prone to cracking and not suitably used as a mask layer for ion implantation.
By contrast, an oxide film containing SiO2 that has a thickness of 1 μm or smaller can prevent small energy applied to implant ions. As such, the ions cannot be accelerated with high energy and are thus implanted to a depth of 0.3 μm at most. As such in general a depth of implantation of 0.6 to 1 μm required for a semiconductor device can hardly be achieved and SiO2 cannot suitably be used as a mask for a SiC semiconductor substrate.
Furthermore, if SiO2 is used as material for a mask, a series of complicated steps is required including employing CVD to deposit SiO2 film, photolithography with resist used, dry etching to provide the SiO2 film with an opening, implanting ions, and removing the SiO2 film. Furthermore, CVD and dry etching require that the semiconductor substrate be introduced in a vacuumed reactor, resulting in poor fabrication efficiency.
Thus employing a mask layer of SiO2 is accompanied by a disadvantageously limited depth of ion implantation. As such it is not positively used in fabricating semiconductor devices employing a SiC semiconductor substrate. Should it be used, a complicated process is still required to overcome the issues as described above.